Ashwinya Mani's Location
San Jose, CA, US
Ashwinya Mani's Work
- ASIC Design Engineer @ Google
- SoC RTL Design Engineer @ Intel Corporation
- Senior RTL Design Engineer @ Oracle
- Hardware Engineer II @ Oracle
- HW Engineer Intern @ Intel Corporation
- HW Engineer Intern @ Intel Corporation
Ashwinya Mani's Education
- University of Southern California
3.5/4
2011 - 2013 9.21 / 10
2007 - 2011
Ashwinya Mani's Skills
- Matlab
- Schematic
- Hardware
- Design
- Government
- Technology
- Cadence Virtuoso
- Computer Architecture
- VLSI
- Verilog
Ashwinya Mani's Summary
Ashwinya Mani, based in San Jose, CA, US, is currently a ASIC Design Engineer at Google, bringing experience from previous roles at Intel Corporation and Oracle. Ashwinya Mani holds a 2011 - 2013 3.5/4 @ University of Southern California. With a robust skill set that includes Matlab, Schematic, Hardware, Design, Government and more, Ashwinya Mani contributes valuable insights to the industry. Ashwinya Mani has 2 emails and 1 mobile phone number on RocketReach.
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